ANSYS and TSMC empower chip manufacturers to design cutting-edge multi-die chip-package systems
As the number of smart, connected electronic devices grow, manufacturers of mobile, networking, automotive, industrial automation and healthcare applications need to design high performing and reliable products at a lower cost. To meet these growing demands, TSMC and ANSYS are collaborating to enhance and deliver the most comprehensive suite of design solutions for TSMC’s wafer-scale Integrated InFO packaging technology.
By working together, TSMC and ANSYS have enabled ANSYS solutions for a variety of multi-die analyses including extraction, power and reliability, signal and power integrity and thermal and electromagnetic interference. The design enablement allows mobile and IoT manufacturers to create cost-effective, thinner and highly reliable cutting-edge mobile and IoT products using ANSYS’ fully validated integrated circuit and package-level solutions.
“Our collaboration with TSMC has enabled the delivery of comprehensive and validated power signal integrity and reliability solutions for InFO package technology within the market,” said John Lee, general manager, ANSYS. “ANSYS’ best in class engineering simulation solutions enable our mutual customers to innovate beyond chip to package and system-level designs for mobile and IoT applications.”
“Through the intensive collaboration of both parties, we are able to address design considerations in reliability and power integrity for InFO technology,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “The enablement of ANSYS solutions ensures their readiness, allowing customers to analyze and design reliable power delivery networks across chip, package and system.”
